1. Field of the Invention
The present invention relates to an output buffer circuit for outputting a differential signal defined by a common mode voltage and an amplitude.
2. Description of the Background Art
There is known a differential buffer having a structure in which a built-in terminating resistor is additionally provided between differential signals to be output from an output buffer circuit of a constant current type as shown in FIG. 10. Referring to an architecture of an output buffer circuit of a constant current type represented by a structure of an output buffer circuit compatible with the interface standard such as an LVDS (Low Voltage Differential Signaling) or a mini-LVDS in which a common mode voltage and an amplitude in a differential signal are defined in the differential buffer, there is used a structure in which a current source is disposed between a power supply and a ground, and a differential switch respectively.
A voltage having a high potential (H) and a voltage having a low potential (L) in a differential signal are represented by VTP and VTM, respectively. As shown in FIG. 9, a common mode voltage VOC of the differential signal is represented by a central voltage (VOC=(VTP+VTM)/2) between an H voltage VTP and an L voltage VTM in the differential signal. Moreover, a voltage VOD having an amplitude of the differential signal is represented by a differential voltage (|VOD|=|VTP−VTM|) between the H voltage VTP and the L voltage VTM in the differential signal.
However, the output buffer circuit of the constant current type has a problem in that a slew rate of the differential signal is limited due to a high impedance caused by the current source and an operating speed is lower under the same power consumption condition as compared with an output buffer circuit of a constant voltage type.
In contrast, if a resistance value of a combined resistor of a built-in terminating resistor and an external terminating resistor is reduced to be a half of a resistance value of the external terminating resistor in the structure of FIG. 10, it is possible to obtain an operating band which is equivalent to a differential signal of the output buffer circuit of the constant voltage type but a consumption current is doubled.
On the other hand, in some output buffer circuits of the constant voltage type according to the related art, a voltage source constituted by a source follower is generally disposed between a power supply and a differential switch and between ground and a differential switch as shown in FIG. 11. With this structure, however, an amplitude and a common mode voltage in a differential signal cannot be controlled and both of voltage sources are source followers. For this reason, the amplitude of the differential signal is also limited by a threshold voltage of an MOS constituting the voltage source.
In contrast, some existing output buffer circuits of the constant voltage type which can control the amplitude of the differential signal have a structure in which one of the voltage sources in the output buffer circuit of the constant voltage type shown in FIG. 11, that is, a voltage source on a ground side in the example of FIG. 12 is eliminated and a differential switch is directly connected to the ground and control is carried out by an operational amplifier in such a manner that a reference voltage and a voltage supplied from a voltage source on a power supply side are equal to each other as shown in FIG. 12.
With this structure, however, the amplitude of the differential signal is obtained with respect to the ground. Therefore, a common mode voltage has amplitude dependency. For this reason, in some cases in which the amplitude is increased, the common mode voltage is also raised and thus gets out of a receivable common mode voltage range on a receiving side where the differential signal is to be received. Consequently, there is a problem in that an amplitude range which can be output is limited. Moreover, there is a problem in that the common mode voltage is varied depending on a value of a terminating resistor at the receiving side or a resistor on a transmission line.
As shown in FIG. 13, furthermore, it is also possible to employ a structure in which the common mode voltage can be controlled in place of the amplitude of the differential signal. In this case, the amplitude of the differential signal cannot be controlled. In addition, it is possible to suppose that a separate operational amplifier from an operational amplifier for amplitude regulation is used to regulate a common mode voltage without depending on an amplitude. When two feedback controls are carried out at the same time, however, they influence on each other so that a stable operation cannot be performed.
The prior art document related to the present invention includes Japanese Patent Application Laid-Open Nos. 2009-152944 and 11-330947.
The Japanese Patent Application Laid-Open No. 2009-152944 describes the output driver circuit having the structure in which there are provided the driver circuit having the voltage source and the current source disposed between the power supply and the differential switch and between ground and the differential switch respectively, and the replica circuit of the driver circuit, the control signal for controlling the reference voltage and the voltage of the predetermined node of the replica circuit to be equal to each other is generated by the operational amplifier, and the control signal is input to the voltage source on the power supply side of the driver circuit and the gate of the voltage source on the power supply side of the replica circuit.
The Japanese Patent Application Laid-Open No. 11-330947 describes the LVDS output buffer in which the internal resistors R1 and R2 having an equal value are disposed in series between the outputs Z and ZB of the differential signal, the feedback loop based on the OPAMP is used to compare the common mode voltage VMID in the node MID in the middle of the internal resistors R1 and R2 with the desirable output voltage VCM, and the current derived from the current source on the ground side is controlled in response to the output of the OPAMP.
With the structure according to the Japanese Patent Application Laid-Open No. 2009-152944, however, the slew rate is limited on the current source side and is not limited on the voltage source side. For this reason, the common mode voltage fluctuates in the output switching.
Moreover the structure according to the Japanese Patent Application Laid-Open No. 11-330947 provides the circuit capable of setting the common mode voltage through the VCM. However, the output buffer circuit is of the constant current type. In the same manner as in the case of the Japanese Patent Application Laid-Open No. 2009-152944, therefore, the fluctuation in the common mode voltage has a problem.